CADENCE DESIGN SYSTEMS, INC. – $130,354.00/Year

MINIMUM REQUIREMENTS Masters degree in Electrical Engineering, Computer Engineering, or related field, plus one 1 year of experience in the job offered, or in a related application engineering occupation.br br SPECIAL REQUIREMENTSbr br Position requiresbr br 1. Design verification utilizing Verilog, SystemVerilog, andor SystemCCC, andor VHDLbr 2. Utilize Verification skills or methodologies, such as System VerilogUVM, to verify the digital blocksbr 3. Utilize Metric Driven Verification methodologies or CodeFunctional coverage or Low Power and X propagationbr 4. Utilizing programming skills CC, perl, python to sort, script, debugbr 5. Problem Solving and debug expertise of complex verification solutionsbr br Must be available to work on projects at various, unanticipated sites throughout the United States.